- 2万-4万/年
- 上海
- |
- 应届生/在校生
- |
- 本科
- |
- 实习
职位诱惑: 福利好,老板nice,天天下午茶,成长空间大,技术领先,技能培训
发布时间: 2022-02-25发布
职位描述
RESPONSIBILITIES:
· Implement SOC DFT function including SCAN, Boundary SCAN, MBIST, Analog Macro test logic.
· Perform verification on all DFT structures
· Generate DFT related timing constraints and work with PD team for timing closure
· Generate and verify DFT structural patterns and functional patterns
· Participate in ATE bring-up and debug the DFT patterns on ATE
· Design and implement other DFX (debug, characterization, yield etc) logics
职位发布者
Shirley
HR
7天
简历处理用时
100%
简历及时处理率
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