ASIC DV 经理
- 40万-70万/年
- 杭州
- |
- 10年以上
- |
- 本科
- |
- 全职
职位诱惑: 技术领先,老板nice,成长空间大,股票期权
发布时间: 2021-09-22发布
职位描述
Job Descriptions:
As a hands-on design verification manager, you will have responsibilities as the followings:
- Manage a SoC verification team and capable of working as a technical lead
- Build, manage, mentor, and grow ASIC Verification team
- Lead the execution including resource planning, setting project priorities and goals, tracking execution, change control, risk and issue management
- Lead the full verification lifecycle tasks including block/full-chip/gate-level/low power verification and code/functional coverage analysis
- Work with design teams to understand and implement chip level requirements
- Collaborate with software and systems teams to ensure a high quality end product
Job Requirements:
- Previous leading team experience and project management experience
- Solid understanding of verification methodology including System Verilog/UVM/SVA
- Hands on experience with the full verification lifecycle
- Experience with leading chip verification project from start to production
- Design knowledge of one or more of industry-standard bus interfaces (PCIe, Ethernet, Switch, GEPON, USB, DDR3, etc.) is a plus.
- Must have strong technical and analytical background and problem-solving skills
- Excellent written and verbal communications skills
- BS or MS in CS/EE with 10+ years of experience