资深模拟设计工程师(高速ADC,PLL,Serdes)
- 40万-70万/年
- 上海
- |
- 3年以上
- |
- 硕士
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- 全职
职位诱惑: 年终奖金,股票期权,技术领先,成长空间大
发布时间: 2019-10-09发布
职位描述
Position : Analog Design Engineer
Responsibilities:
n Take charge of key IP development for analog/mix-signal IC design project and ensure the quality
n Design, simulation and verification of analog circuits
n Guide layout engineer design
n Cooperate with application and product engineers and test engineers to make the product successfully enter mass production;
n Responsible for design documentation.
Requirements:
n MS degree or above with 3+ years’ experience in IC industry
n Solid understanding on circuit analysis, verification and IC design technology
n Good silicon debug capability
n Experience in designing one or more of the following circuits: Band-gap, LDO, oscillator, IO, ESD, ADC, DAC, PLL, VCO, regulator, filter, SERDES, etc.
n Experience in designing high-speed and high-resolution ADC/DAC is preferred.
n Solid problem-solving and trouble-shooting skills. Enjoy thinking, taking things apart and making things work.
n Self-motivation, result oriented, good team work and communication skills.