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Synopsys

静态时序分析技术支持工程师

收藏职位
  • 我要分享
  • 30万-40万/年
  • 北京
  • |
  • 3年以上
  • |
  • 本科
  • |
  • 全职

职位诱惑: 年终奖金,五险一金,技术领先,成长空间大,技能培训

发布时间: 2021-09-13发布

职位描述

This position plays a critical role in the success of Synopsys customers as they design custom ICs which push the limits of complexity, time to market and silicon technology by enabling the adoption of Synopsys transistor-level static timing analysis products and methodologies.
Customer support roles include training, problem resolution, methodology guidance, technology deployment and customer project support.

Job Requirements:
MSEE (or equivalent) required with 3+ years custom design experience or BSEE (or equivalent) with 5+ years custom design experience.
Design experience should include library characterization, analog & mixed signal design, circuit simulation. Knowledge of cell-based AP&R design methodologies is also required. 
Working experience of RC extraction, static timing analysis, logic synthesis, auto place & route and signal integrity analysis with Synopsys AMS or digital flow in leading-edge process nodes is strongly preferred.
Excellent verbal and written communication with English and Mandarin are required. 
Customer oriented working, ability to multiplex many issues, self-driven and the desire to help customers exploit new technologies is essential for success 
Business travel is required. 

职位发布者

HR

HR

7天

简历处理用时

100%

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