资深数字设计工程师

Job description
1. Carry out all Smart card IC development activities in the field of digital design;
2. Generate RTL coding in Verilog and VHDL according specification and DFT requirement;
3. Write synthesis scripts and perform the logic synthesis and timing analysis;
4. Write test patterns and perform simulation and regression, and write block descriptions and verification and validation    reports;
5. DFT implementation and verification include BSCAN(JTAG)/MBIST/ATPG;
6. Perform backend digital design (logic synthesis, formal check, define design constraints for place & route, perform timing          closure, DFT);
7. Generate and debug test patterns for product test program development and help to do the debug; 
8. Work closely with bench validation and characterization team to support successful product release.  

Desired Skills and Experience
1. Minimum of 3 years (5 years for BSEE) experience for digital design with Bachelor or Master Degree; 
2. Familiar with Cadence front-end design tools: NC-Sim, RTL Compiler, Conformal, etc; 
3. Familiar with 80C51 and ARM based CPU architecture, and microcontrollers programming and application; 
4. Creative thinker with helicopter view, capable of finding an appropriate solution to complex problems; 
5. Team player, able to work in a cross-functional-team environment.