PD Intern
- 2万-3万/年
- 上海
- |
- 应届生/在校生
- |
- 本科
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- 实习
职位诱惑: 福利好,老板nice
发布时间: 2019-02-27发布
职位描述
Job responsibilities:
Implements ASIC backend design, including floorplan, placement, CTS, routing, parasitic extraction, STA, Power analysis, Xtalk analysis, physical verification and etc.
Knowledge Requirements:
Basic understanding of CMOS VLSI IC design knowledge.
Basic logic/RTL design knowledge.
Basic skills in Linux, PC window setup.
Be familiar with programming (TCL, Perl, shell script, C).
Language: Good English read/write.
Experienced with back-end ASIC design and integration flow knowledge is plus.
Experienced with common EDA tools flow, ie: ICC/Encounter/PrimeTime/Calibre is plus.