ASIC Layout Design Intern
- 2万-3万/年
- 上海
- |
- 应届生/在校生
- |
- 硕士
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- 实习
职位诱惑: 技术领先,成长空间大
发布时间: 2019-02-27发布
职位描述
RESPONSIBILITIES:
• Overseas definition, design, verification, and documentation for ASIC development
• Determines architecture design, logic design, and system simulation
• Defines module interfaces/formats for simulation
• Contributes to the development of multidimensional designs involving the layout of complex integrated circuits
• Evaluates all aspects of the process flow from high-level design to synthesis, place and route, and timing and power use
• Analyzes equipment to establish operation data, conducts experimental tests, and evaluates results
• May also review vendor capability to support development
REQUIREMENTS:
• Familiar with Verilog HDL coding and ASIC Frond-End implementation flow
• Computer architecture and computer arithmetic
• Computer graphics basic knowledge
• Experience with database technologies and database-driven custom web application development
• Familiar with Unix/Linux and scripts (TCL, Ruby, Perl, Python etc.)
• Strong problem solving skills, and attention to details
• Strong task-based organization skills
• Good interpersonal skills (verbal and written)
• Strong passion in achievement and career development