Sr. DFT Engineer
- 30万-50万/年
- 上海
- |
- 5年以上
- |
- 本科
- |
- 全职
职位诱惑: 技术领先,成长空间大
发布时间: 2020-02-21发布
职位描述
What you do at AMD changes everything
At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center.
Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
The successful candidate will work with team members and apply
- Design for Test (DFT) RTL design and coding quality (CDC/LEDA) improvement.
- Implement basic DFT schemes, including scan insertion, boundary scan, Mem BIST,DRC clean, ATPG and pattern simulation
- Develop the high coverage and cost effective test patterns.
- Support synthesis owner to fix DFT related netlist issues.
- Support other teams for DFT related problems (such as ATE patterns debug)
- Participate in SoC level DFT architecture definition.
- Work with architect and designer to develop test plan
Position Requirement:
- Bachelor with 8+ year experience or Master with 6+ year experience.
- Solid knowledge on DFT design, including JTAG, IEEE1500, MBIST and ATPG.
- Basic knowledge of ASIC/SOC design flow, including coding, simulation, verification, synthesis and STA
- Familiar with TetraMAX , DFT Compiler tool
- Verilog coding experience.
- Perl, TCL, Makefile coding experience
- Good English communication skill and team work.
- Fast learning and hard working.
EDUCATION:
Major in EE, CS or related, Master Degree with 6+ years or Bachelor with 8+ years working experiences