Implementation Engineer/综合工程师

Company Description
Synaptics is the pioneer and leader of the human interface revolution, bringing innovative and intuitive user experiences to intelligent devices. Synaptics’ broad portfolio of touch, display, biometrics, voice, audio, and multimedia products is built on the company’s rich R&D, extensive IP and dependable supply chain capabilities. With solutions designed for mobile, PC, smart home, and automotive industries, Synaptics combines ease of use, functionality and aesthetics to enable products that help make our digital lives more productive, secure and enjoyable. (NASDAQ: SYNA) www.synaptics.com.
Join Synaptics on Twitter, LinkedIn, and Facebook, or visit www.synaptics.com.

Job Responsibilities
？ Design/verification of SoC-level logic including clock, reset.
？ All DFT related rtl level logics include Pinmux, Scan, At Speed Scan, Mbist, Boundary scan, and Testbus design and verification.
？ Physical implementation including chip synthesis and all DFT related logic insertion and verification.
？ Timing constraint/SDC develop and timing closure at functional reg to reg and IO/DFT timing, crosstalk analysis, etc.
？ Support product testing and debug manufacture failures.
？ Low power design includes power analysis, architecture definition and methodology development.
？ Scripting, Unix shell, TCL

Required Qualifications
? BSEE/MSEE + 3-5 years hands on SOC integration or Physical Implementation
? Good skill of English for reading, writing.
? RTL design and synthesis.
? Experience of supporting DFT.
? Experience on Static timing, timing closure, and noise analysis.
? Experience on Cadence EPS and CPF flow will be a plus.

工作描述：
- 系统芯片集成和验证，包括芯片时钟，复位电路设计和验证。
- DFT相关逻辑设计，包括pinmux, scan, at speed scan, mbist, boundary scan, testbus等设计和验证。
- 物理实现,包括芯片综合，DFT逻辑插入和验证。
- 时序约束定义，包括功能，IO，DFT时序收敛，串扰分析等等。
- 支持产品测试和制造缺陷分析。
- 低功耗设计，包括功耗分析、结构和方法定义。
- Unix, TCL等编写脚本。
职位需求：
- 硕士或者本科3到5年系统集成和物理实现工作经验。
- 良好的英语读写能力。
- RTL设计和综合。
- DFT设计经验。
- 具有静态时序分析，时序收敛以及串扰分析能力。
- 熟悉Cadence EP/Synopsys和CPF流程者优先。