ASIC Design methodology Engineer
- 15万-30万/年
- 上海
- |
- 应届生/在校生
- |
- 本科
- |
- 全职
职位诱惑: 年终奖金,五险一金,福利好,技术领先,免费班车,成长空间大,年底双薪,交通补助,老板nice
发布时间: 2019-02-25发布
职位描述
ASIC Design methodology Engineer
Responsibilities:
• Participate in the design and implementation of the leading edge, front-end or back-end ASIC design flow which covers from logical design to physical implementation (synthesis, place and route etc)
• Participate in the research of Design Methodology to improve automation and productivity
• Work closely with design team for projects’ Tapeout
Requirements:
• Major in CS, EE or related, master or bachelor degree.
• Knowledge of ASIC design (Digital circuit design, verilogHDL) is required
• Be familiar with Linux working environment
• Experience in program with one or more languages (CShell, TCL, Perl or python etc.) is a plus
• Experience in any ASIC flow and/or EDA tools (DesignCompiler, Primetime, Formality, VSI-LP, ICC etc.) is a plus
• Good in English writing and speaking
• Be eager to learn new knowledge, be able to resolve complex problem.
职位发布者
AMD
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