Analog design engineer

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19.2万-33.6万/年
上海
|
工作经验不限
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硕士
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全职

职位诱惑: 五险一金,福利好,老板nice,成长空间大

发布时间: 2019-12-10发布

职位描述

Job Requirements:
- Solid understanding of analog/mixed signal IC design, including feedback theory, device mismatch, signal noise, phase noise, jitter and jitter tolerance.
- Silicon experience on one or more areas in the following: Sigma delta ADC, SAR ADC, High speed DAC, power management, audio codec, and timing circuits such as PLL, clock-and-data recovery (CDR), TX and RX functions.
- Lab characterization and debug experience is desirable.
- Familiar with EDA tools such as Cadence Design Systems, matlab is a plus
- Verilog & verilogA coding and simulation is a significant plus.
- Must be a self-starter and team player.

Education Requirements:
M.S./PhD in EE.